Recently, Beijing ESWIN Computing Technology Co., Ltd. (hereinafter referred to as "ESWIN Computing") announced the completion of more than 3 billion yuan in Series D financing, led by Financial Street Capital, co-led by Guoxin Venture Capital, Yizhuang State Investment, Ruicheng Fund, Zhongxin Fund, Yixing Fund, GF Qianhe, Jiantou Investment, Guangzhou Industrial Investment Group, National Integrated Circuit Industry Investment Fund Phase II, Yuncong Technology, Juanhu Dream, Chuxin Fund, Ceyuan Capital, UHD Industry Fund and other institutions followed, and Light Source Capital served as the exclusive financial advisor. This round of financing will be used for R&D investment.

In recent years, RISC-V has gained strong momentum in the fields of Internet of Things and smart home, and is expanding to smart cars, industry, edge computing and other fields. As an open-source computing architecture, RISC-V has the characteristics of simplified instructions, modularization, low cost, and customization, and is more suitable for the AIoT era where chip usage scenarios are more fragmented and differentiated. Following the X-86 and ARM architectures, the RISC-V architecture is expected to become the third pole of the chip computing architecture. According to the data, the shipment of RISC-V architecture processor cores in 2022 will exceed the milestone 10 billion, and according to Semico Research, the shipment of RISC-V architecture processor cores will reach 80 billion by 2025, with broad market prospects.

Since its establishment in 2019, ESWIN Computing is a provider of next-generation computing architecture chips and solutions with RISC-V as the core, and has been committed to independent research and development of RISC-V computing architecture to promote the large-scale application of RISC-V architecture chip products. At present, ESWIN Computing has formed a full-stack platform integrating software and hardware, with 32-bit and 64-bit serialized CPU IP. The 32-bit self-developed CPU IP covers a variety of embedded application scenarios from ultra-low-power electronic tags to energy-efficient wireless connectivity, 64-bit high-performance self-developed CPU IP is also implemented in multimedia, wireless routing, edge computing and other application scenarios, and the automotive-grade 32-bit and 64-bit CPU IP are used in automotive microcontrollers, assisted driving, Internet of Vehicles and other scenarios, further expanding and enriching the application ecology of RISC-V. In terms of information security ecosystem, ESWIN Computing's self-defined RISC-V security extension can be applied to self-developed 32-bit and 64-bit CPU and chip products, improving the information security protection capabilities of products based on RISC-V CPU and meeting the security business needs of multiple scenarios such as smart wearables, smart TVs/set-top boxes, and vehicle/Internet of Vehicles.

ESWIN Computing actively participates in the construction of the RISC-V open source software ecosystem, and contributes RISC-V related patches to the open source community to improve the autonomy and standardization of RISC-V software system adaptation. As of June 2023, the number of patches officially accepted by ESWIN Computing has rapidly increased to more than 60, and has been included in the mainline source code of AOSP (Android Open Source Project), Chromium, GNU, OpenSBI, OP-TEE, QEMU and other open source communities.

At present, ESWIN Computing has established cooperation with a number of global strategic customers. In the future, it will further iterate and enrich the product matrix, and at the same time promote open cooperation in the semiconductor industry chain through open source ecology and common technology development platform, so as to help the RISC-V industry implement all scenarios.

Cheng Ruiqi, chairman of Financial Street Capital, said that the localization of core technology is an important factor in building the long-term competitiveness of China's chip industry, and the era of intelligent Internet of Things in which we live needs more streamlined, fast and low-power chip products, which puts forward higher requirements for the core technology of chips.

Yin Xundun, general manager of Guoxin Venture Capital, said that the era of the Internet of Things has ushered in a major development opportunity for RISC-V, and ESWIN Computing, under the leadership of excellent management and technical team, has end-to-end development capabilities from self-developed IP to products, especially in the in-depth layout of RISC-V, which opens up space for the company's long-term development in the future.

(Source: Investment Community)